/*******************************************************************
 *
 * Copyright (C), 2021-2022, LS, All rights reserved.
 *
 * Author      : 
 * Create Time : 2020-12-14
 * Version     : v0.1
 * Description : 
 *******************************************************************/
#ifndef _BSP_HW_CONFIG_H_
#define _BSP_HW_CONFIG_H_

/*----------------------------Head file----------------------------*/
#include "error.h"
#include "stdint.h"
#include "stdbool.h"

#include "i2c.h"
#include "adc.h"
#include "gpio.h"
#include "OSAL_Timers.h"
#include "user_config.h"

/*----------------------------macro file---------------------------*/

#define app_get_sys_clock       osal_GetSystemClock

#define USR_DISABLE     0
#define USR_ENABLE      1UL


//DEBUG
//#define DBG_UART_BAUDRATE     115200

//Peripheral power contrl
#if (BATT_TYPE == ANEROID_BATT)
#define BOOST_POWER_CTRL_EN     USR_ENABLE
#else
#define BOOST_POWER_CTRL_EN     USR_DISABLE
#endif
#define BSP_BOOST_PWR_PIN_NUM   P0

//BATT ADC
#define	BSP_BATT_ADC_PIN_NUM    P11
#define BSP_BATT_ADC_CH_NUM     ADC_CH1N_P11

//CHARGE
#define BAT_FULL_CHG_DET_ENABLE 0
#define BSP_DET_CHG_PIN_NUM     P7
#define BSP_FULL_CHG_PIN_NUM    P31

//BUTTON
#define BSP_BUTTON_PIN_NUM      P3//P3 //P14

//MOTOR
#define BSP_MOTOR_PIN_NUM       P15
#define BSP_MOTOR_PWM_CH_NUM    PWM_CH0

//HALL
#if (BATT_TYPE == ANEROID_BATT)
#define HALL3_PIN_ENABLE        USR_DISABLE
#else
#define HALL3_PIN_ENABLE        USR_ENABLE
#endif
#define BSP_HALL1_PIN_NUM       P20
#define BSP_HALL2_PIN_NUM       P18
#define BSP_HALL3_PIN_NUM       P14

#define BSP_HALL_PWR_EN         1
//#define BSP_HALL_PWR_PIN_NUM    P2  //Same with LCD VDD

//DISP
#define BSP_DISP_PWR_PIN_NUM    P2
#define BSP_DISP_BL_PIN_NUM     P26
#define BSP_DISP_CS_PIN_NUM     P32
#define BSP_DISP_WR_PIN_NUM     P33
#define BSP_DISP_DATA_PIN_NUM	P34


//FLASH AREA
#define SF_SECTOR_SIZE              (0x1000)

#define CUSTOM_FLASH_START_ADDR     (0x59000)
#define CUSTOM_FLASH_END_ADDR       (0x80000)   //Total: 156K

//20K
#define BURN_INFO_START_ADDR        CUSTOM_FLASH_START_ADDR                         //0x59000
#define SETTING_INFO_START_ADDR     (BURN_INFO_START_ADDR + SF_SECTOR_SIZE)         //0x5A000
#define BLE_ADV_NAME_START_ADDR     (SETTING_INFO_START_ADDR + SF_SECTOR_SIZE)      //0x5B000
#define RESERVE_SECTOR_START_ADDR   (BLE_ADV_NAME_START_ADDR + SF_SECTOR_SIZE)      //0x5C000
#define TEMP_DATA_RST_ADDR          (RESERVE_SECTOR_START_ADDR + SF_SECTOR_SIZE)   //0x5D000

//40K
#define SF_MEM_DATA_ADDR                (TEMP_DATA_RST_ADDR + SF_SECTOR_SIZE)        //0x5E000
#define SKIP_INDEX_SAVED_START_ADDR     SF_MEM_DATA_ADDR
#define SKIP_INDEX_SAVED_END_ADDR       (SKIP_INDEX_SAVED_START_ADDR + 3*SF_SECTOR_SIZE) //0x61000
#define SKIP_DATA_SAVED_START_ADDR      SKIP_INDEX_SAVED_END_ADDR
#define SKIP_DATA_SAVED_END_ADDR        (SKIP_DATA_SAVED_START_ADDR + 0x7000)       //0x68000

#define RESERVE_SECTOR2_START_ADDR   (SKIP_DATA_SAVED_END_ADDR + SF_SECTOR_SIZE)      //0x69000

//8K
#define FILE_TXT_MAX_SIZE           SF_SECTOR_SIZE
#define FILE_TXT_SAVE_ADDR	        RESERVE_SECTOR2_START_ADDR
#define FILE_TXT_TMP_ADDR	        (FILE_TXT_SAVE_ADDR + SF_SECTOR_SIZE)	//0x6A000
#define FILE_TXT_END_ADDR           (FILE_TXT_TMP_ADDR + SF_SECTOR_SIZE)    //0x6B000

//84K
#define DISP_IMG_START_ADDR         0x6B000
#define DISP_IMG_MAX_SIZE           (CUSTOM_FLASH_END_ADDR - DISP_IMG_START_ADDR)

#if (FILE_TXT_END_ADDR > DISP_IMG_START_ADDR)
#error "Err DISP_IMG_START_ADDR addr definition"
#endif

#endif

